Lianbo Wu
Lianbo Wu
Verified email at
Cited by
Cited by
A fully integrated dual-channel on-coil CMOS receiver for array coils in 1.5–10.5 T MRI
B Sporrer, L Wu, L Bettini, C Vogt, J Reber, J Marjanovic, T Burger, ...
IEEE transactions on biomedical circuits and systems 11 (6), 1245-1255, 2017
A dual-mode NB-IoT and EC-GSM RF-SoC achieving− 128-dBm extended-coverage and supporting OTDOA and A-GPS positioning
M Korb, S Willi, B Weber, H Kröll, A Traber, S Altorfer, D Tschopp, J Rogin, ...
ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018
Towards wearable MR detection: a stretchable wrist array with on-body digitization
A Port, J Reber, C Vogt, J Marjanovic, B Sporrer, L Wu
Proc. Intl. Soc. Mag. Reson. Med 26, 17, 2018
27.4 A sub-1dB NF dual-channel on-coil CMOS receiver for Magnetic Resonance Imaging
B Sporrer, L Wu, L Bettini, C Vogt, J Reber, J Marjanovic, T Burger, ...
2017 IEEE International Solid-State Circuits Conference (ISSCC), 454-455, 2017
A 3.3-GHz 101fsrms-Jitter,− 250.3 dB FOM Fractional-N DPLL with Phase Error Detection Accomplished in Fully Differential Voltage Domain
L Wu, T Burger, P Schönle, Q Huang
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order Loop
P Chen, X Huang, Y Chen, L Wu, RB Staszewski
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (11), 3734-3744, 2018
An Ultra-Low-Power ADPLL for BLE Applications
L Wu
Threshold Switching Enabled Sub-pW-Leakage, Hysteresis-Free Circuits
B Cheng, A Emboras, E Passerini, M Lewerenz, U Koch, L Wu, J Liao, ...
IEEE Transactions on Electron Devices 68 (6), 3112-3118, 2021
An Adaptively-Biased Output-Capacitor-Free Low-Dropout Regulator with Supply-Ripple-Subtraction and Pole-Tracking-Compensation
X Han, L Wu, Y Gao, WH Ki
IEEE Transactions on Power Electronics, 2021
A Power-Efficient Fractional-N DPLL With Phase Error Quantized in Fully Differential-Voltage Domain
L Wu, T Burger, P Schönle, Q Huang
IEEE Journal of Solid-State Circuits 56 (4), 1254-1264, 2021
Design of Power-Efficient High-Purity Phase-locked Frequency Synthesis
L Wu
ETH Zurich, 2020
The system can't perform the operation now. Try again later.
Articles 1–11