Yoshikazu Miyanaga
Yoshikazu Miyanaga
Chitose Institute of Science and Technology
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Cited by
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An autonomous learning-based algorithm for joint channel and power level selection by D2D pairs in heterogeneous cellular networks
A Asheralieva, Y Miyanaga
IEEE transactions on communications 64 (9), 3996-4012, 2016
Scalable architecture for word HMM-based speech recognition and VLSI implementation in complete system
S Yoshizawa, N Wada, N Hayasaka, Y Miyanaga
IEEE Transactions on Circuits and Systems I: Regular Papers 53 (1), 70-77, 2006
Adaptive identification of a time-varying ARMA speech model
Y Miyanaga, N Miki, N Nagai
IEEE transactions on acoustics, speech, and signal processing 34 (3), 423-433, 1986
Cepstral gain normalization for noise robust speech recognition
S Yoshizawa, N Hayasaka, N Wada, Y Miyanaga
2004 IEEE International Conference on Acoustics, Speech, and Signal …, 2004
Combining satellite imagery and open data to map road safety
A Najjar, S Kaneko, Y Miyanaga
Proceedings of the AAAI Conference on Artificial Intelligence 31 (1), 2017
MIMO zero-forcing detection analysis for correlated and estimated Rician fading
C Siriteanu, Y Miyanaga, SD Blostein, S Kuriki, X Shi
IEEE transactions on Vehicular Technology 61 (7), 3087-3099, 2012
A speech analysis algorithm which eliminates the influence of pitch using the model reference adaptive system
Y Miyanaga, N Miki, N Nagai, K Hatori
IEEE Transactions on Acoustics, Speech, and Signal Processing 30 (1), 88-96, 1982
QoS-oriented mode, spectrum, and power allocation for D2D communication underlaying LTE-A network
A Asheralieva, Y Miyanaga
IEEE transactions on vehicular technology 65 (12), 9787-9800, 2016
Tunable wordlength architecture for a low power wireless OFDM demodulator
S Yoshizawa, Y Miyanaga
IEICE transactions on fundamentals of electronics, communications and …, 2006
OTA-based high frequency CMOS multiplier and squaring circuit
R Hidayat, K Dejhan, P Moungnoul, Y Miyanaga
2008 International Symposium on Intelligent Signal Processing and …, 2009
VLSI implementation of a 4× 4 MIMO-OFDM transceiver with an 80-MHz channel bandwidth
S Yoshizawa, Y Miyanaga
2009 IEEE International Symposium on Circuits and Systems (ISCAS), 1743-1746, 2009
On a time-varying complex speech analysis
K Funaki, Y Miyanaga, K Tochinai
9th European Signal Processing Conference (EUSIPCO 1998), 1-4, 1998
An area and power efficient pipeline FFT processor for 8× 8 MIMO-OFDM systems
S Yoshizawa, A Orikasa, Y Miyanaga
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2705-2708, 2011
Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching
Y Kaneta, S Yoshizawa, S Minato, H Arimura, Y Miyanaga
2010 International Conference on Field-Programmable Technology, 21-28, 2010
Dynamic time warping for speech recognition with training part to reduce the computation
X Sun, Y Miyanaga, B Sai
Journal of Signal Processing 18 (2), 89-96, 2014
Use of a variable wordlength technique in an OFDM receiver to reduce energy dissipation
S Yoshizawa, Y Miyanaga
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (9), 2848-2859, 2008
Optimal contract design for joint user association and intercell interference mitigation in heterogeneous LTE-A networks with asymmetric information
A Asheralieva, Y Miyanaga
IEEE Transactions on Vehicular Technology 66 (6), 5284-5300, 2016
A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver
S Yoshizawa, Y Yamauchi, Y Miyanaga
2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2486-2489, 2008
A partial transmit sequence technique for PAPR reduction in MIMO-OFDM systems
D Phetsomphou, S Yoshizawa, Y Miyanaga
2010 10th International Symposium on Communications and Information …, 2010
ARMA digital lattice filter based on new criterion
Y Miyanaga, N Nagai, N Miki
IEEE transactions on circuits and systems 34 (6), 617-628, 1987
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