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Keiji Kimura
Keiji Kimura
Verified email at apal.cs.waseda.ac.jp
Title
Cited by
Cited by
Year
Method for controlling heterogeneous multiprocessor and multigrain parallelizing compiler
H Kasahara, K Kimura, J Shirako, Y Wada, M Ito, H Shikano
US Patent 8,250,548, 2012
1212012
Multiprocessor system and multigrain parallelizing compiler
H Kasahara, K Kimura, J Shirako, M Ito, H Shikano
US Patent 7,895,453, 2011
732011
Global compiler for controlling heterogeneous multiprocessor
H Kasahara, K Kimura, H Shikano
US Patent 8,051,412, 2011
692011
A 45nm 37.3 GOPS/W heterogeneous multi-core SoC
Y Yuyama, M Ito, Y Kiyoshige, Y Nitta, S Matsui, O Nishii, A Hasegawa, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 100-101, 2010
642010
Oscar api for real-time low-power multicores and its performance on multicores and smp servers
K Kimura, M Mase, H Mikami, T Miyamoto, J Shirako, H Kasahara
Languages and Compilers for Parallel Computing: 22nd International Workshop …, 2010
612010
Multigrain parallel processing on compiler cooperative chip multiprocessor
K Kimura, Y Wada, H Nakano, T Kodaka, J Shirako, K Ishizaka, ...
9th Annual Workshop on Interaction between Compilers and Computer …, 2005
602005
An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler
M Ito, T Hattori, Y Yoshida, K Hayase, T Hayashi, O Nishii, Y Yasu, ...
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
582008
A 4320mips four-processor core smp/amp with individually managed clock frequency for low power consumption
Y Yoshida, T Kamei, K Hayase, S Shibahara, O Nishii, T Hattori, ...
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007
552007
Compiler control power saving scheme for multi core processors
J Shirako, N Oshiyama, Y Wada, H Shikano, K Kimura, H Kasahara
International Workshop on Languages and Compilers for Parallel Computing …, 2005
522005
Memory management method, information processing device, program creation method, and program
H Kasahara, K Kimura, H Nakano, T Nito, T Maruyama, T Miura, ...
US Patent 8,438,359, 2013
452013
Parallelizable c and its performance on low power high performance multicore processors
M Mase, Y Onozaki, K Kimura, H Kasahara
Proc. of 15th Workshop on Compilers for Parallel Computing 2011, 2010
352010
Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding
H Shikano, M Ito, M Onouchi, T Todaka, T Tsunoda, T Kodama, ...
IEEE Journal of Solid-State Circuits 43 (4), 902-910, 2008
272008
Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores
A Hayashi, Y Wada, T Watanabe, T Sekiguchi, M Mase, J Shirako, ...
Languages and Compilers for Parallel Computing: 23rd International Workshop …, 2011
262011
Performance of OSCAR multigrain parallelizing compiler on SMP servers
K Ishizaka, T Miyamoto, J Shirako, M Obata, K Kimura, H Kasahara
Languages and Compilers for High Performance Computing: 17th International …, 2005
222005
Multigrain parallel processing for jpeg encoding on a single chip multiprocessor
T Kodaka, K Kimura, H Kasahara
International Workshop on Innovative Architecture for Future Generation High …, 2002
222002
Parallelism extraction method and method for making program
H Kasahara, K Kimura, A Hayashi, H Mikami, Y Kanehagi, D Umeda, ...
202021
Efficient checkpointing with recompute scheme for non-volatile main memory
M Alshboul, H Elnawawy, R Elkhouly, K Kimura, J Tuck, Y Solihin
ACM Transactions on Architecture and Code Optimization (TACO) 16 (2), 1-27, 2019
192019
Near fine grain parallel processing using static scheduling on single chip multiprocessors
K Kimura, H Kasahara
Innovative Architecture for Future Generation High-Performance Processors …, 1999
191999
OSCAR multi-grain architecture and its evaluation
H Kasahara, W Ogata, K Kimura, G Matsui, H Matsuzaki, M Okamoto, ...
Proceedings Innovative Architecture for Future Generation High-Performance …, 1997
191997
Multigrain parallel processing on OSCAR CMP
K Kimura, T Kodaka, M Obata, H Kasahara
Innovative Architecture for Future Generation High-Performance Processors …, 2003
162003
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