| Analysis of Failure Mechanisms and Extraction of Activation Energies in 21-nm nand Flash Cells K Lee, M Kang, S Seo, DH Li, J Kim, H Shin IEEE Electron Device Letters 34 (1), 48-50, 2012 | 49 | 2012 |
| Activation Energies of Failure Mechanisms in Advanced NAND Flash Cells for Different Generations and Cycling K Lee, M Kang, S Seo, D Kang, S Kim, DH Li, H Shin IEEE transactions on electron devices 60 (3), 1099-1107, 2013 | 47 | 2013 |
| Semiconductor device K Kanamori, HM Park, YS Kim, KH Lee, JH Lim, JH Han US Patent 10,998,301, 2021 | 40 | 2021 |
| The compact modeling of channel potential in sub-30-nm NAND flash cell string M Kang, K Lee, DH Chae, BG Park, H Shin IEEE electron device letters 33 (3), 321-323, 2012 | 38 | 2012 |
| An accurate compact model considering direct-channel interference of adjacent cells in sub-30-nm NAND flash technologies M Kang, IH Park, IJ Chang, K Lee, S Seo, BG Park, H Shin IEEE electron device letters 33 (8), 1114-1116, 2012 | 33 | 2012 |
| Accurate lifetime estimation of sub-20-nm NAND flash memory K Lee, M Kang, Y Hwang, H Shin IEEE Transactions on Electron Devices 63 (2), 659-667, 2016 | 31 | 2016 |
| Generation dependence of retention characteristics in extremely scaled NAND flash memory D Kang, K Lee, S Seo, S Kim, JS Lee, DS Bae, DH Li, Y Hwang, H Shin IEEE electron device letters 34 (9), 1139-1141, 2013 | 25 | 2013 |
| Analysis of failure mechanisms during the long-term retention operation in 3-D NAND flash memories S Kim, K Lee, C Woo, Y Hwang, H Shin IEEE Transactions on Electron Devices 67 (12), 5472-5478, 2020 | 21 | 2020 |
| Analysis of failure mechanisms in erased state of sub 20-nm NAND Flash memory K Lee, D Kang, H Shin, S Kwon, S Kim, Y Hwang 2014 44th European Solid State Device Research Conference (ESSDERC), 58-61, 2014 | 17 | 2014 |
| Separation of corner component in TAT mechanism in retention characteristics of sub 20-nm NAND flash memory K Lee, M Kang, S Seo, D Kang, DH Li, Y Hwang, H Shin IEEE electron device letters 35 (1), 51-53, 2013 | 16 | 2013 |
| Three-dimensional semiconductor memory device K Lee, Y Kim, B Kim, TH Kim, DK Seo, LIM Junhee US Patent 10,651,195, 2020 | 15 | 2020 |
| Investigation of retention characteristics for trap-assisted tunneling mechanism in sub 20-nm NAND flash memory K Lee, H Shin IEEE Transactions on Device and Materials Reliability 17 (4), 758-762, 2017 | 13 | 2017 |
| Probability level dependence of failure mechanisms in sub-20 nm NAND flash memory D Kang, K Lee, M Kang, S Seo, DH Li, Y Hwang, H Shin IEEE Electron Device Letters 35 (3), 348-350, 2014 | 10 | 2014 |
| Analysis of read disturbance mechanism in retention of sub-20 nm NAND flash memory D Kang, K Lee, S Kwon, S Kim, Y Hwang, H Shin Japanese Journal of Applied Physics 54 (4S), 04DD03, 2015 | 9 | 2015 |
| Memory device with memory cell structure including ferroelectric data storage layer, and a first gate and a second gate KH Lee, SH Kim, YS Kim, JH Lim, K Kanamori US Patent 10,896,711, 2021 | 7 | 2021 |
| Modeling of apparent activation energy and lifetime estimation in NAND flash memory K Lee, M Kang, Y Hwang, H Shin Semiconductor Science and Technology 30 (12), 125006, 2015 | 7 | 2015 |
| Method of writing data in nonvolatile memory device, with divided subpages or subblocks, and method of erasing data in nonvolatile memory device with divided subpages or subblocks K Kanamori, C Kang, YS Kim, KH Lee US Patent 10,896,728, 2021 | 6 | 2021 |
| Semiconductor device SH Park, YS Kim, H Kim, S Yamada, KH Lee, JH Hong, YS Hwang US Patent 11,469,252, 2022 | 5 | 2022 |
| Semiconductor devices including upper and lower selectors K Kanamori, YS Kim, KH Lee, JH Lim, JH Han US Patent 11,088,163, 2021 | 5 | 2021 |
| The threshold voltage variation on etch angle of channel-hole in vertical NAND flash memories DS Kang, K Lee, S Seo, D Li, H Shin Proceedings of the International Semiconductor Device Research Symposium, 2013 | 5 | 2013 |
