| A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface N Miura, Y Koizumi, E Sasaki, Y Take, H Matsutani, T Kuroda, H Amano, ... 2013 IEEE COOL Chips XVI, 1-3, 2013 | 196 | 2013 |
| Analyzing and mitigating the impact of manufacturing variability in power-constrained supercomputing Y Inadomi, T Patki, K Inoue, M Aoyagi, B Rountree, M Schulz, ... Proceedings of the International Conference for High Performance Computing …, 2015 | 157 | 2015 |
| A Neural Network Based On-device Learning Anomaly Detector for Edge Devices M Tsukada, M Kondo, H Matsutani arXiv preprint arXiv:1907.10147, 2019 | 91 | 2019 |
| A small, fast and low-power register file by bit-partitioning M Kondo, H Nakamura High-Performance Computer Architecture, 2005. HPCA-11. 11th International …, 2005 | 88 | 2005 |
| Cool mega-arrays: Ultralow-power reconfigurable accelerator chips N Ozaki, Y Yasuda, M Izawa, Y Saito, D Ikebuchi, H Amano, H Nakamura, ... IEEE Micro 31 (6), 6-18, 2011 | 83 | 2011 |
| A fine-grain dynamic sleep control scheme in MIPS R3000 N Seki, L Zhao, J Kei, D Ikebuchi, Y Kojima, Y Hasegawa, H Amano, ... Computer Design, 2008. ICCD 2008. IEEE International Conference on, 612-617, 2008 | 76 | 2008 |
| Adaptive Power Management in Solar Energy Harvesting Sensor Node Using Reinforcement Learning S Shresthamali, M Kondo, H Nakamura ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 181, 2017 | 72 | 2017 |
| Geyser-1: A MIPS R3000 CPU core with fine grain runtime power gating D Ikebuchi, N Seki, Y Kojima, M Kamata, L Zhao, H Amano, T Shirai, ... Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian, 281-284, 2009 | 64 | 2009 |
| QECOOL: On-Line Quantum Error Correction with a Superconducting Decoder for Surface Code Y Ueno, M Kondo, M Tanaka, Y Suzuki, Y Tabuchi arXiv preprint arXiv:2103.14209, 2021 | 56 | 2021 |
| A scalable 3D heterogeneous multicore with an inductive ThruChip interface N Miura, Y Koizumi, Y Take, H Matsutani, T Kuroda, H Amano, ... IEEE Micro 33 (6), 6-15, 2013 | 52 | 2013 |
| Design and implementation of fine-grain power gating with ground bounce suppression K Usami, T Shirai, T Hashida, H Masuda, S Takeda, M Nakata, N Seki, ... VLSI Design, 2009 22nd International Conference on, 381-386, 2009 | 48 | 2009 |
| Federated Learning-Based Network Intrusion Detection with a Feature Selection Approach Y Qin, M Kondo 2021 International Conference on Electrical, Communication, and Computer …, 2021 | 45 | 2021 |
| Production hardware overprovisioning: Real-world performance optimization using an extensible power-aware resource management framework R Sakamoto, T Cao, M Kondo, K Inoue, M Ueda, T Patki, D Ellsworth, ... Parallel and Distributed Processing Symposium (IPDPS), 2017 IEEE …, 2017 | 45 | 2017 |
| Improving fairness, throughput and energy-efficiency on a chip multiprocessor through DVFS M Kondo, H Sasaki, H Nakamura ACM SIGARCH Computer Architecture News 35 (1), 31-38, 2007 | 45 | 2007 |
| An intra-task dvfs technique based on statistical analysis of hardware events H Sasaki, Y Ikeda, M Kondo, H Nakamura Proceedings of the 4th international conference on Computing frontiers, 123-130, 2007 | 44 | 2007 |
| Demand-Aware Power Management for Power-Constrained HPC Systems T Cao, Y He, M Kondo Cluster, Cloud and Grid Computing (CCGrid), 2016 16th IEEE/ACM International …, 2016 | 41 | 2016 |
| Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC R Watanabe, M Kondo, M Imai, H Nakamura, T Nanya Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE'07, 1-6, 2007 | 37 | 2007 |
| Cooling-Aware Job Scheduling and Node Allocation for Overprovisioned HPC Systems T Cao, W Huang, Y He, M Kondo Parallel and Distributed Processing Symposium (IPDPS), 2017 IEEE …, 2017 | 28 | 2017 |
| Design and evaluation of fine-grained power-gating for embedded microprocessors M Kondo, H Kobyashi, R Sakamoto, M Wada, J Tsukamoto, M Namiki, ... Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 …, 2014 | 28 | 2014 |
| QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery Y Ueno, M Kondo, M Tanaka, Y Suzuki, Y Tabuchi 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 26 | 2022 |
