Pritish Narayanan
Pritish Narayanan
IBM Research - Almaden
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Deep learning with limited numerical precision
S Gupta, A Agrawal, K Gopalakrishnan, P Narayanan
International Conference on Machine Learning, 1737-1746, 2015
Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element
GW Burr, RM Shelby, S Sidler, C Di Nolfo, J Jang, I Boybat, RS Shenoy, ...
IEEE Transactions on Electron Devices 62 (11), 3498-3507, 2015
Neuromorphic computing using non-volatile memory
GW Burr, RM Shelby, A Sebastian, S Kim, S Kim, S Sidler, K Virwani, ...
Advances in Physics: X 2 (1), 89-124, 2017
Equivalent-accuracy accelerated neural-network training using analogue memory
S Ambrogio, P Narayanan, H Tsai, RM Shelby, I Boybat, C di Nolfo, ...
Nature 558 (7708), 60-67, 2018
Access devices for 3D crosspoint memory
GW Burr, RS Shenoy, K Virwani, P Narayanan, A Padilla, B Kurdi, ...
Journal of Vacuum Science & Technology B 32 (4), 040802, 2014
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)
GW Burr, P Narayanan, RM Shelby, S Sidler, I Boybat, C di Nolfo, ...
2015 IEEE International Electron Devices Meeting (IEDM), 4.4. 1-4.4. 4, 2015
Fault-tolerant nanoscale processors on semiconductor nanowire grids
CA Moritz, T Wang, P Narayanan, M Leuchtenburg, Y Guo, C Dezan, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (11), 2422-2437, 2007
Recent progress in analog memory-based accelerators for deep learning
H Tsai, S Ambrogio, P Narayanan, RM Shelby, GW Burr
Journal of Physics D: Applied Physics 51 (28), 283001, 2018
CMOS control enabled single-type FET NASIC
P Narayanan, M Leuchtenburg, T Wang, CA Moritz
2008 IEEE Computer Society Annual Symposium on VLSI, 191-196, 2008
MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays
RS Shenoy, GW Burr, K Virwani, B Jackson, A Padilla, P Narayanan, ...
Semiconductor Science and Technology 29 (10), 104005, 2014
Toward on-chip acceleration of the backpropagation algorithm using nonvolatile memory
P Narayanan, A Fumarola, LL Sanches, K Hosokawa, SC Lewis, ...
IBM Journal of Research and Development 61 (4/5), 11: 1-11: 11, 2017
Heterogeneous Two-Level logic and its density and fault tolerance implications in nanoscale fabrics
T Wang, P Narayanan, CA Moritz
IEEE Transactions on Nanotechnology 8 (1), 22-30, 2008
Manufacturing pathway and associated challenges for nanoscale computational systems
P Narayanan, KW Park, CO Chui, CA Moritz
2009 9th IEEE Conference on Nanotechnology (IEEE-NANO), 119-122, 2009
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Impact of conductance response
S Sidler, I Boybat, RM Shelby, P Narayanan, J Jang, A Fumarola, K Moon, ...
2016 46th European Solid-State Device Research Conference (ESSDERC), 440-443, 2016
Towards logic functions as the device
P Shabadi, A Khitun, P Narayanan, M Bao, I Koren, KL Wang, CA Moritz
2010 IEEE/ACM International Symposium on Nanoscale Architectures, 11-16, 2010
NASICs: A nanoscale fabric for nanoscale microprocessors
T Wang, P Narayanan, M Leuchtenburg, CA Moritz
2008 2nd IEEE International Nanoelectronics Conference, 989-994, 2008
Accelerating machine learning with non-volatile memory: Exploring device and circuit tradeoffs
A Fumarola, P Narayanan, LL Sanches, S Sidler, J Jang, K Moon, ...
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2016
Circuit-level benchmarking of access devices for resistive nonvolatile memory arrays
P Narayanan, GW Burr, K Virwani, B Kurdi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (3 …, 2016
Combining 2-level logic families in grid-based nanoscale fabrics
T Wang, P Narayanan, CA Moritz
2007 IEEE International Symposium on Nanoscale Architectures, 101-108, 2007
Bidirectional Non-Filamentary RRAM as an Analog Neuromorphic Synapse, Part I: Al/Mo/Pr0.7Ca0.3MnO3 Material Improvements and Device Measurements
K Moon, A Fumarola, S Sidler, J Jang, P Narayanan, RM Shelby, GW Burr, ...
IEEE Journal of the Electron Devices Society 6, 146-155, 2017
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