Follow
Charles Chiasson
Charles Chiasson
Unknown affiliation
No verified email
Title
Cited by
Cited by
Year
COFFE: Fully-automated transistor sizing for FPGAs
C Chiasson, V Betz
2013 International Conference on Field-Programmable Technology (FPT), 34-41, 2013
1042013
Should FPGAs abandon the pass-gate?
C Chiasson, V Betz
2013 23rd International Conference on Field programmable Logic and …, 2013
952013
On hard adders and carry chains in FPGAs
J Luu, C McCullough, S Wang, S Huda, B Yan, C Chiasson, KB Kent, ...
2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014
462014
Architectural enhancements in intelŪ agilex™ fpgas
J Chromczak, M Wheeler, C Chiasson, D How, M Langhammer, ...
Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020
442020
Optimizing FPGA logic block architectures for arithmetic
KE Murray, J Luu, MJP Walker, C McCullough, S Wang, S Huda, B Yan, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (6 …, 2020
172020
Optimization and modeling of FPGA circuitry in advanced process technology
C Chiasson
University of Toronto, 2013
132013
Memory Circuits A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines.....................
L Lu, T Yoo, VL Le, TTH Kim, MA Qureshi, J Park, S Kim, C McCullough, ...
The system can't perform the operation now. Try again later.
Articles 1–7