An energy-efficient micropower neural recording amplifier W Wattanapanitch, M Fee, R Sarpeshkar IEEE Transactions on Biomedical Circuits and Systems 1 (2), 136-147, 2007 | 562 | 2007 |
A low-power 32-channel digitally programmable neural recording integrated circuit W Wattanapanitch, R Sarpeshkar IEEE Transactions on Biomedical Circuits and Systems 5 (6), 592-602, 2011 | 178 | 2011 |
Low-power circuits for brain–machine interfaces R Sarpeshkar, W Wattanapanitch, SK Arfin, BI Rapoport, S Mandal, ... IEEE Transactions on Biomedical Circuits and Systems 2 (3), 173-183, 2008 | 114 | 2008 |
Low-power analog architecture for brain-machine interfaces BI Rapoport, R Sarpeshkar, W Wattanapanitch, S Mandal, S Arfin US Patent 8,332,024, 2012 | 38 | 2012 |
Efficient universal computing architectures for decoding neural activity BI Rapoport, L Turicchia, W Wattanapanitch, TJ Davidson, R Sarpeshkar Public Library of Science 7 (9), e42492, 2012 | 28 | 2012 |
A biomimetic adaptive algorithm and low-power architecture for implantable neural decoders BI Rapoport, W Wattanapanitch, HL Penagos, S Musallam, RA Andersen, ... 2009 Annual International Conference of the IEEE Engineering in Medicine and …, 2009 | 16 | 2009 |
Micropower neural amplifier with adaptive input-referred noise R Sarpeshkar, BI Rapoport, W Wattanapanitch US Patent 8,200,325, 2012 | 13 | 2012 |
A 2.64- 71-dB SNDR Discrete-Time Signal-Folding Amplifier for Reducing ADC's Resolution Requirement in Wearable ECG Acquisition Systems C Ratametha, S Tepwimonpetkun, W Wattanapanitch IEEE Transactions on Biomedical Circuits and Systems 14 (1), 48-64, 2019 | 11 | 2019 |
A micropower motion artifact estimator for input dynamic range reduction in wearable ECG acquisition systems B Pholpoke, T Songthawornpong, W Wattanapanitch IEEE transactions on biomedical circuits and systems 13 (5), 1021-1035, 2019 | 11 | 2019 |
A sub-microwatt class-AB super buffer: Frequency compensation for settling-time improvement P Prasopsin, W Wattanapanitch IEEE Transactions on Circuits and Systems II: Express Briefs 65 (1), 26-30, 2017 | 11 | 2017 |
Graphical analysis and design of multistage operational amplifiers with active feedback Miller compensation S Tepwimonpetkun, B Pholpoke, W Wattanapanitch International Journal of Circuit Theory and Applications 44 (3), 562-583, 2016 | 11 | 2016 |
An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays W Wattanapanitch Massachusetts Institute of Technology, 2007 | 10 | 2007 |
A low-power wide-load-range output-capacitorless low-dropout voltage regulator with indirect-direct nested miller compensation T Limpisawas, W Wattanapanitch IEEE Access 10, 67396-67412, 2022 | 7 | 2022 |
Design of a low‐power high open‐loop gain operational amplifier for capacitively‐coupled instrumentation amplifiers P Prasopsin, W Wattanapanitch International Journal of Circuit Theory and Applications 45 (11), 1552-1575, 2017 | 7 | 2017 |
Multi-electrode, energy-recycling, resonant stimulation circuits and architectures for nerve blocking R Sarpeshkar, W Wattanapanitch US Patent 10,434,313, 2019 | 6 | 2019 |
Low-power analog-circuit architecture for decoding neural signals BI Rapoport, R Sarpeshkar, W Wattanapanitch US Patent 8,352,385, 2013 | 6 | 2013 |
Portable Digital Blood Pressure Monitor W Wattanapanitch http://www. people. cornell. edu/pages/ws62/, 2007 | 6 | 2007 |
A low-power high-input-impedance ECG readout system employing a very high-gain amplification and a signal-folding technique for dry-electrode recording C Buaban, C Ratametha, T Limpisawas, T Songthawornpong, B Pholpoke, ... IEEE Sensors Journal 21 (17), 18905-18919, 2021 | 5 | 2021 |
A compact low-power mixed-signal architecture for powerline interference rejection in biopotential analog front ends P Prasopsin, B Pholpoke, S Tepwimonpetkun, W Wattanapanitch 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings …, 2014 | 5 | 2014 |
Formulation and Emulation of Quantum-Inspired Dynamical Systems With Classical Analog Circuits AJ Cressman, W Wattanapanitch, I Chuang, R Sarpeshkar Neural Computation 34 (4), 856-890, 2022 | 2 | 2022 |