| Neuromorphic Vision Hybrid RRAM-CMOS Architecture JK Eshraghian, K Cho, C Zheng, M Nam, HHC Iu, W Lei, K Eshraghian IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (12 …, 2018 | 19 | 2018 |
| Signal flow platform for mapping and simulation of vertebrate retina for sensor systems K Cho, S Baek, SW Cho, JH Kim, YS Goo, JK Eshraghian, N Iannella, ... IEEE Sensors Journal 16 (15), 5856-5866, 2016 | 18 | 2016 |
| Modelling and characterization of dynamic behavior of coupled memristor circuits JK Eshraghian, HHC Iu, T Fernando, D Yu, Z Li 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 690-693, 2016 | 16 | 2016 |
| Analog Weights in ReRAM DNN Accelerators JK Eshraghian, SM Kang, S Baek, G Orchard, HHC Iu, W Lei 2019 IEEE International Conference on Artificial Intelligence Circuits and …, 2019 | 15 | 2019 |
| Formulation and implementation of nonlinear integral equations to model neural dynamics within the vertebrate retina JK Eshraghian, S Baek, JH Kim, N Iannella, K Cho, YS Goo, HHC Iu, ... International Journal of Neural Systems 28 (07), 1850004, 2018 | 15 | 2018 |
| Adaptive precision cnn accelerator using radix-x parallel connected memristor crossbars J Lee, JK Eshraghian, K Cho, K Eshraghian arXiv preprint arXiv:1906.09395, 2019 | 12 | 2019 |
| Analysis and generation of chaos using compositely connected coupled memristors C Zheng, HHC Iu, T Fernando, D Yu, H Guo, JK Eshraghian Chaos: An Interdisciplinary Journal of Nonlinear Science 28 (6), 063115, 2018 | 12 | 2018 |
| Maximization of crossbar array memory using fundamental memristor theory JK Eshraghian, KR Cho, HHC Iu, T Fernando, N Iannella, SM Kang, ... IEEE Transactions on Circuits and Systems II: Express Briefs 64 (12), 1402-1406, 2017 | 11 | 2017 |
| Complementary Metal‐Oxide Semiconductor and Memristive Hardware for Neuromorphic Computing M Rahimi Azghadi, YC Chen, JK Eshraghian, J Chen, CY Lin, ... Advanced Intelligent Systems, 1900189, 2020 | 10 | 2020 |
| Modelling and analysis of signal flow platform implementation into retinal cell pathway JK Eshraghian, S Baek, K Cho, N Iannella, JH Kim, YS Goo, HHC Iu, ... 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 491-494, 2016 | 8 | 2016 |
| A novel universal interface for constructing memory elements for circuit applications C Zheng, D Yu, HHC Iu, T Fernando, T Sun, JK Eshraghian, H Guo IEEE Transactions on Circuits and Systems I: Regular Papers 66 (12), 4793-4806, 2019 | 6 | 2019 |
| Nano-Programmable logics based on double-layer anti-facing memristors J Lee, JK Eshraghian, M Jeong, F Shan, HHC Iu, K Cho Journal of nanoscience and nanotechnology 19 (3), 1295-1300, 2019 | 5 | 2019 |
| Nonlinear retinal response modeling for future neuromorphic instrumentation JK Eshraghian, S Baek, T Levi, T Kohno, S Al-Sarawi, PHW Leong, K Cho, ... IEEE Instrumentation & Measurement Magazine 23 (1), 21-29, 2020 | 4 | 2020 |
| A memristor-CMOS Braun multiplier array for arithmetic pipelining S Baek, JK Eshraghian, SH Ahn, A James, K Cho 2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019 | 4 | 2019 |
| A Real-Time Retinomorphic Simulator Using a Conductance-Based Discrete Neuronal Network JK Eshraghian, S Baek, W Thio, Y Sandamirskaya, HHC Iu, WD Lu 2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020 | 3 | 2020 |
| Human ownership of artificial creativity JK Eshraghian Nature Machine Intelligence 2 (3), 157-160, 2020 | 2 | 2020 |
| Biological modeling of vertebrate retina: Rod cell to bipolar cell JK Eshraghian, K Cho, S Baek, JH Kim, K Eshraghian 2017 40th International Conference on Telecommunications and Signal …, 2017 | 2 | 2017 |
| Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications M Rahimiazghadi, C Lammie, JK Eshraghian, M Payvand, E Donati, ... IEEE Transactions on Biomedical Circuits and Systems, 2020 | 1* | 2020 |
| Modeling of coupled memristive-based architectures applicable to neural network models J Eshraghian, H Iu, K Eshraghian Memristor and Memristive Neural Networks, 167, 2018 | 1 | 2018 |
| Storage Logic Primitives Based on Stacked Memristor-CMOS Technology SW Cho, J Eshraghian, JS Eom, S Kim, K Cho Journal of nanoscience and nanotechnology 16 (12), 12726-12731, 2016 | 1 | 2016 |
Herbert Ho-Ching IuProfessor, School of Electrical, Electronic and Computer Engineering, The University of Western AustraliaVerified email at uwa.edu.au
