| Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress N Goel, T Naphade, S Mahapatra 2015 IEEE International Reliability Physics Symposium, 4A. 3.1-4A. 3.7, 2015 | 49 | 2015 |
| Investigation of stochastic implementation of reaction diffusion (RD) models for NBTI related interface trap generation T Naphade, N Goel, PR Nair, S Mahapatra Reliability Physics Symposium (IRPS), 2013 IEEE International, XT. 5.1-XT. 5.11, 2013 | 29 | 2013 |
| Design and analysis of layered coarse-grained reconfigurable architecture ZE Rákossy, T Naphade, A Chattopadhyay Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference …, 2012 | 27 | 2012 |
| A novel physics-based variable NBTI simulation framework from small area devices to 6T-SRAM T Naphade, K Roy, S Mahapatra Electron Devices Meeting (IEDM), 2013 IEEE International, 33.6. 1-33.6. 4, 2013 | 24 | 2013 |
| DC/AC BTI variability of SRAM circuits simulated using a physics-based compact model T Naphade, P Verma, N Goel, S Mahapatra 2014 IEEE International Reliability Physics Symposium, CA. 2.1-CA. 2.8, 2014 | 11 | 2014 |
| Modeling of stochastic BTI in small area devices and its impact on SRAM performance T Naphade, S Mahapatra Microelectronics Technology and Devices (SBMicro), 2014 29th Symposium on, 1-4, 2014 | 1 | 2014 |
Pradeep NairProfessor, Dept of Electrical Engineering, IIT BombayVerified email at ee.iitb.ac.in
