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Giulio Gambardella
Giulio Gambardella
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Finn: A framework for fast, scalable binarized neural network inference
Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
11692017
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks
M Blott, TB Preußer, NJ Fraser, G Gambardella, K O’brien, Y Umuroglu, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 16, 2018
3802018
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
V Rybalkin, A Pappalardo, MM Ghaffar, G Gambardella, N Wehn, M Blott
2018 28th International Conference on Field Programmable Logic and …, 2018
842018
Scaling binarized neural networks on reconfigurable logic
NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017
732017
Inference of quantized neural networks on heterogeneous all-programmable devices
TB Preußer, G Gambardella, N Fraser, M Blott
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 833-838, 2018
512018
An area-efficient 2-D convolution implementation on FPGA for space applications
S Di Carlo, G Gambardella, M Indaco, D Rolfo, G Tiotto, P Prinetto
Design and Test Workshop (IDT), 2011 IEEE 6th International, 88-92, 2011
502011
A cloud-based Cyber-Physical System for environmental monitoring
T Sanislav, G Mois, S Folea, L Miclea, G Gambardella, P Prinetto
2014 3rd Mediterranean Conference on Embedded Computing (MECO), 6-9, 2014
432014
A software-based self test of CUDA Fermi GPUs
S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ...
Test Symposium (ETS), 2013 18th IEEE European, 1-6, 2013
412013
Efficient Error-Tolerant Quantized Neural Network Accelerators
G Gambardella, J Kappauf, M Blott, C Doehring, M Kumm, P Zipf, ...
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019
392019
FAT: Training Neural Networks for Reliable Inference Under Hardware Faults
U Zahid, G Gambardella, NJ Fraser, M Blott, K Vissers
2020 IEEE International Test Conference (ITC), 1-10, 2020
292020
Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic
J Su, NJ Fraser, G Gambardella, M Blott, G Durelli, DB Thomas, ...
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018
282018
Customizing low-precision deep neural networks for FPGAs
J Faraone, G Gambardella, D Boland, N Fraser, M Blott, PHW Leong
2018 28th International Conference on Field Programmable Logic and …, 2018
222018
A novel methodology to increase fault tolerance in autonomous FPGA-based systems
S Di Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta, A Vallero
2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 87-92, 2014
222014
Fault mitigation strategies for CUDA GPUs
S Di Carlo, G Gambardella, I Martella, P Prinetto, D Rolfo, P Trotta
2013 IEEE International Test Conference (ITC), 1-8, 2013
202013
Evaluation of optimized cnns on heterogeneous accelerators using a novel benchmarking approach
M Blott, NJ Fraser, G Gambardella, L Halder, J Kath, Z Neveu, ...
IEEE Transactions on Computers 70 (10), 1654-1669, 2020
192020
Compressing low precision deep neural networks using sparsity-induced regularization in ternary networks
J Faraone, N Fraser, G Gambardella, M Blott, PHW Leong
Neural Information Processing: 24th International Conference, ICONIP 2017 …, 2017
162017
SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs
SD Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (1), 1, 2015
132015
Increasing the robustness of CUDA Fermi GPU-based systems
S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ...
2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 234-235, 2013
112013
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic
M Blott, TB Preußer, N Fraser, G Gambardella, K O'Brien, Y Umuroglu, ...
Computer Design (ICCD), 2017 IEEE International Conference on, 419-422, 2017
102017
Fault Tolerant Neural Network Accelerators with Selective TMR
TG Bertoa, G Gambardella, NJ Fraser, M Blott, J McAllister
IEEE Design & Test, 2022
92022
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