Kalman predictor-based proactive dynamic thermal management for 3-D NoC systems with noisy thermal sensors Y Fu, L Li, K Wang, C Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 23 | 2017 |
A 67.5 μJ/prediction accelerator for spiking neural networks in image segmentation Q Chen, G He, X Wang, J Xu, S Shen, H Chen, Y Fu, L Li IEEE Transactions on Circuits and Systems II: Express Briefs 69 (2), 574-578, 2021 | 22 | 2021 |
An energy efficient STDP-based SNN architecture with on-chip learning C Sun, H Sun, J Xu, J Han, X Wang, X Wang, Q Chen, Y Fu, L Li IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 5147-5158, 2022 | 21 | 2022 |
Cerebron: A reconfigurable architecture for spatiotemporal sparse spiking neural networks Q Chen, C Gao, Y Fu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (10 …, 2022 | 21 | 2022 |
Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions H Chen, H Yang, W Song, Z Lu, Y Fu, L Li, Z Yu IEEE Transactions on Circuits and Systems I: Regular Papers 68 (3), 1231-1244, 2021 | 20 | 2021 |
An efficient accelerator for multiple convolutions from the sparsity perspective Q Chen, Y Huang, R Sun, W Song, Z Lu, Y Fu, L Li IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (6 …, 2020 | 19 | 2020 |
A cordic-based architecture with adjustable precision and flexible scalability to implement sigmoid and tanh functions H Chen, L Jiang, Y Luo, Z Lu, Y Fu, L Li, Z Yu 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 18 | 2020 |
Hyperbolic CORDIC-based architecture for computing logarithm and its implementation H Chen, K Cheng, Z Lu, Y Fu, L Li IEEE Transactions on Circuits and Systems II: Express Briefs 67 (11), 2652-2656, 2020 | 18 | 2020 |
Joint detection and decoding of polar-coded OFDM-IDMA systems X Deng, J Sha, X Zhou, Y Fu, Z Zhang, X You, C Zhang IEEE Transactions on Circuits and Systems I: Regular Papers 66 (10), 4005-4017, 2019 | 18 | 2019 |
An efficient hardware accelerator for the MUSIC algorithm H Chen, K Chen, K Cheng, Q Chen, Y Fu, L Li Electronics 8 (5), 511, 2019 | 15 | 2019 |
An efficient hardware architecture with adjustable precision and extensible range to implement sigmoid and tanh functions H Chen, L Jiang, H Yang, Z Lu, Y Fu, L Li, Z Yu Electronics 9 (10), 1739, 2020 | 12 | 2020 |
Congestion-aware dynamic elevator assignment for partially connected 3D-NoCs Y Fu, Q Chen, G He, K Chen, Z Lu, C Zhang, L Li 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 11 | 2019 |
Optimized sorting network for successive cancellation list decoding of polar codes K Wang, L Li, F Han, F Feng, J Lin, Y Fu, J Sha IEICE Electronics Express 14 (18), 20170735-20170735, 2017 | 8 | 2017 |
A general methodology and architecture for arbitrary complex number Nth root computation H Chen, R Wu, Z Lu, Y Fu, L Li, Z Yu 2021 IEEE international symposium on circuits and systems (ISCAS), 1-5, 2021 | 7 | 2021 |
Thermal sensor placement and thermal reconstruction under Gaussian and non-Gaussian sensor noises for 3-D NoC Y Fu, L Li, H Pan, K Wang, F Feng, Q Chen, C Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 7 | 2018 |
Accelerating cache coherence in manycore processor through silicon photonic chiplet C Li, F Jiang, S Chen, J Zhang, Y Liu, Y Fu, J Xu Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 6 | 2022 |
Low-complexity high-precision method and architecture for computing the logarithm of complex numbers H Chen, Z Yu, Y Zhang, Z Lu, Y Fu, L Li IEEE Transactions on Circuits and Systems I: Regular Papers 68 (8), 3293-3304, 2021 | 6 | 2021 |
An Efficient Streaming Accelerator for Low Bit-Width Convolutional Neural Networks Q Chen, Y Fu, W Song, K Cheng, Z Lu, C Zhang, L Li Electronics 8 (4), 371, 2019 | 6 | 2019 |
Performance and network power evaluation of tightly mixed SRAM NUCA for 3D multi-core network on chips Y Zhang, L Li, Z Lu, A Jantsch, Y Fu, M Gao 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1961-1964, 2014 | 6 | 2014 |
Low-latency low-complexity method and architecture for computing arbitrary Nth root of complex numbers R Wu, H Chen, G He, Y Fu, L Li IEEE Transactions on Circuits and Systems I: Regular Papers 69 (6), 2529-2541, 2022 | 5 | 2022 |