| Conflict resolution for pipelined layered LDPC decoders C Marchand, JB Doré, L Conde-Canencia, E Boutillon 2009 IEEE Workshop on Signal Processing Systems, 220-225, 2009 | 48 | 2009 |
| Architecture and finite precision optimization for layered LDPC decoders C Marchand, L Conde-Canencia, E Boutillon Journal of Signal Processing Systems 65, 185-197, 2011 | 46 | 2011 |
| Conflict resolution by matrix reordering for DVB-T2 LDPC decoders C Marchand, JB Doré, L Conde-Canencia, E Boutillon GLOBECOM 2009-2009 IEEE Global Telecommunications Conference, 1-6, 2009 | 29 | 2009 |
| LDPC decoder architecture for DVB-S2 and DVB-S2X standards C Marchand, E Boutillon 2015 IEEE Workshop on Signal Processing Systems (SiPS), 1-5, 2015 | 22 | 2015 |
| Hardware discrete channel emulator E Boutillon, Y Tang, C Marchand, P Bomel 2010 International Conference on High Performance Computing & Simulation …, 2010 | 19 | 2010 |
| Hybrid check node architectures for NB-LDPC decoders C Marchand, E Boutillon, H Harb, L Conde-Canencia, A Al Ghouwayel IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 869-880, 2018 | 13 | 2018 |
| NB-LDPC check node with pre-sorted input C Marchand, E Boutillon 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 13 | 2016 |
| High-speed conflict-free layered LDPC decoder for the DVB-S2,-T2 and-C2 standards C Marchand, L Conde-Canencia, E Boutillon SiPS 2013 Proceedings, 118-123, 2013 | 12 | 2013 |
| Pre-sorted forward-backward NB-LDPC check node architecture H Harb, C Marchand, A Al Ghouwayel, L Conde-Canencia, E Boutillon 2016 IEEE International Workshop on Signal Processing Systems (SiPS), 142-147, 2016 | 9 | 2016 |
| Implementation of an LDPC decoder for the DVB-S2,-T2 and-C2 standards C Marchand Université de Bretagne Sud, 2010 | 9 | 2010 |
| Extended-forward architecture for simplified check node processing in NB-LDPC decoders C Marchand, E Boutillon, H Harb, L Conde-Canencia, A Al Ghouwayel 2017 IEEE International Workshop on Signal Processing Systems (SiPS), 1-6, 2017 | 7 | 2017 |
| Simplified compression of redundancy free trellis sections in turbo decoder E Boutillon, JL Sanchez-Rojas, C Marchand IEEE communications letters 18 (6), 941-944, 2014 | 6 | 2014 |
| Compression of redundancy free trellis stages in turbo‐decoder E Boutillon, J Sánchez‐Rojas, C Marchand Electronics Letters 49 (7), 460-462, 2013 | 6 | 2013 |
| Elementary check node-based syndrome decoding using pre-sorted inputs C Marchand, E Boutillon US Patent 10,476,523, 2019 | 5 | 2019 |
| Before convergence early stopping criterion for inner LDPC code in DVB standards C Marchand, E Boutillon Electronics Letters 51 (1), 114-116, 2015 | 4 | 2015 |
| Elementary check node processing for syndrome computation for non-binary LDPC codes decoding C Marchand, E Boutillon US Patent 10,560,120, 2020 | 3 | 2020 |
| Design and implementation of a near maximum likelihood decoder for Cortex codes C Marchand, MB Hammouda, Y Eustache, L Conde-Canencia, ... 2012 7th International Symposium on Turbo Codes and Iterative Information …, 2012 | 3 | 2012 |
| Ultra-high-throughput EMS NB-LDPC decoder with full-parallel node processing H Harb, ACA Ghouwayel, L Conde-Canencia, C Marchand, E Boutillon Journal of Signal Processing Systems 94 (10), 1031-1045, 2022 | 2 | 2022 |
| Parallel cn-vn processing for nb-ldpc decoders H Harb, C Marchand, L Conde-Canencia, E Boutillon, AC Al Ghouwayel 2021 IEEE Workshop on Signal Processing Systems (SiPS), 88-93, 2021 | 2 | 2021 |
| The best, the requested, and the default non-binary LDPC decoding algorithm J Jabour, C Marchand, E Boutillon 2021 11th International Symposium on Topics in Coding (ISTC), 1-5, 2021 | 2 | 2021 |
E. BoutillonLab-STICC, Université de Bretagne SudVerified email at univ-ubs.fr
