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Raphael Polig
Raphael Polig
IBM Research - Zurich
Verified email at zurich.ibm.com
Title
Cited by
Cited by
Year
Network-attached FPGAs for data center applications
J Weerasinghe, R Polig, F Abel, C Hagleitner
2016 International Conference on Field-Programmable Technology (FPT), 36-43, 2016
962016
Formal techniques for effective co-verification of hardware/software co-designs
R Mukherjee, M Purandare, R Polig, D Kroening
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
392017
Accelerating arithmetic kernels with coherent attached FPGA coprocessors
H Giefers, R Polig, C Hagleitner
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
332015
Sparse matrix multiplication using a single field programmable gate array module
C Bekas, A Curioni, H Giefers, C Hagleitner, RC Polig, PWJ Staar
US Patent 9,558,156, 2017
302017
Hardware-accelerated regular expression matching for high-throughput text analytics
K Atasu, R Polig, C Hagleitner, FR Reiss
2013 23rd International Conference on Field programmable Logic and …, 2013
272013
Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system
H Giefers, R Polig, C Hagleitner
2014 IEEE 25th International Conference on Application-Specific Systems …, 2014
232014
Giving text analytics a boost
R Polig, K Atasu, L Chiticariu, C Hagleitner, HP Hofstee, FR Reiss, H Zhu, ...
IEEE Micro 34 (4), 6-14, 2014
202014
Sparse matrix multiplication using a single field programmable gate array module
C Bekas, A Curioni, H Giefers, C Hagleitner, RC Polig, PWJ Staar
US Patent 10,685,082, 2020
162020
Compiling text analytics queries to FPGAs
R Polig, K Atasu, H Giefers, L Chiticariu
2014 24th international conference on Field Programmable Logic and …, 2014
162014
A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware
CM Angerer, R Polig, D Zegarac, H Giefers, C Hagleitner, C Bekas, ...
Sustainable Computing: Informatics and Systems 12, 72-82, 2016
122016
Token-based dictionary pattern matching for text analytics
R Polig, K Atasu, C Hagleitner
2013 23rd International Conference on Field programmable Logic and …, 2013
112013
Non-deterministic finite state machine module for use in a regular expression matching system
K Atasu, C Hagleitner, R Polig, FR Reiss
US Patent 9,983,876, 2018
102018
A high-speed and large-scale dictionary matching engine for information extraction systems
K Agarwal, R Polig
2013 IEEE 24th International Conference on Application-Specific Systems …, 2013
102013
Accelerated analysis of Boolean gene regulatory networks
M Purandare, R Polig, C Hagleitner
2017 27th International Conference on Field Programmable Logic and …, 2017
92017
Energy-efficient stochastic matrix function estimator for graph analytics on FPGA
H Giefers, P Staar, R Polig
2016 26th International Conference on Field Programmable Logic and …, 2016
92016
Measuring and modeling the power consumption of energy-efficient FPGA coprocessors for GEMM and FFT
H Giefers, R Polig, C Hagleitner
Journal of Signal Processing Systems 85, 307-323, 2016
82016
A hardware compilation framework for text analytics queries
R Polig, K Atasu, H Giefers, C Hagleitner, L Chiticariu, F Reiss, H Zhu, ...
Journal of Parallel and Distributed Computing 111, 260-272, 2018
72018
Exploring the design space of programmable regular expression matching accelerators
K Atasu, R Polig, J Rohrer, C Hagleitner
Journal of Systems Architecture 59 (10), 1184-1196, 2013
72013
Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
D Diamantopoulos, R Polig, B Ringlein, M Purandare, B Weiss, ...
2021 IEEE 14th International Conference on Cloud Computing (CLOUD), 726-729, 2021
62021
Fpga accelerated analysis of boolean gene regulatory networks
M Manica, R Polig, M Purandare, R Mathis, C Hagleitner, MR Martinez
IEEE/ACM Transactions on Computational Biology and Bioinformatics 17 (6 …, 2019
62019
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Articles 1–20