| Apparatuses and methods for use in selecting or isolating memory cells L Laurin, A Benvenuti, M Riva US Patent App. 14/077,726, 2014 | 44 | 2014 |
| Impact of the current density increase on reliability in scaled BJT-selected PCM for high-density applications A Redaelli, A Pirovano, I Tortorelli, F Ottogalli, A Ghetti, L Laurin, ... 2010 IEEE International Reliability Physics Symposium, 615-619, 2010 | 24 | 2010 |
| Advanced Metrics for Quantification of By‐Process Segregation beyond Ternary Systems E Petroni, M Patelmo, A Serafini, D Codegoni, L Laurin, M Baldo, ... physica status solidi (RRL)–Rapid Research Letters 17 (8), 2200458, 2023 | 2 | 2023 |
| Modeling environment for Ge-rich GST phase change memory cells M Baldo, L Laurin, E Petroni, G Samanni, M Allegra, E Gomiero, D Ielmini, ... 2022 IEEE International Memory Workshop (IMW), 1-4, 2022 | 2 | 2022 |
| Sequential voltage ramp-down of access lines of non-volatile memory device A Fayrushin, A Benvenuti, A Goda, L Laurin, H Liu US Patent 10,803,948, 2020 | 2 | 2020 |
| Atomistic approach for Boron Transient enhanced diffusion and clustering A Mauri, L Laurin, F Montalenti, A Benvenuti 2008 International Conference on Simulation of Semiconductor Processes and …, 2008 | 2 | 2008 |
| Modeling and Analysis of Virgin Ge-Rich GST Embedded Phase Change Memories M Baldo, O Melnic, M Scudieri, G Nicotra, M Borghi, E Petroni, A Motta, ... IEEE Transactions on Electron Devices 70 (3), 1055-1060, 2023 | 1 | 2023 |
| Integrated assemblies having transistors configured for high-voltage applications ZA Shafi, L Laurin, DP Panda, S Vigano US Patent 11,430,888, 2022 | 1 | 2022 |
| Sequential voltage ramp-down of access lines of non-volatile memory device A Fayrushin, A Benvenuti, A Goda, L Laurin, H Liu US Patent 11,417,396, 2022 | 1 | 2022 |
| Interaction between forming pulse and integration process flow in ePCM M Baldo, E Petroni, L Laurin, G Samanni, O Melnic, D Ielmini, A Redaelli 2022 17th Conference on Ph. D Research in Microelectronics and Electronics …, 2022 | 1 | 2022 |
| High Ion/Ioff ratio BJT selector for 32 cell string resistive RAM arrays A Redaelli, L Laurin, S Lavizzari, C Cupeta, G Servalli, A Benvenuti 2014 44th European Solid State Device Research Conference (ESSDERC), 238-241, 2014 | 1 | 2014 |
| Bipolar junction transistors and memory arrays F Ottogalli, L Laurin US Patent 8,766,235, 2014 | 1 | 2014 |
| The role of the substrate in the high energy boron implantation damage recovering I Mica, L Di Piazza, L Laurin, M Mariani, AG Mauri, ML Polignano, E Ricci, ... Materials Science and Engineering: B 159, 168-172, 2009 | 1 | 2009 |
| Memory devices UM Meotto, E Camerienghi, P Tessariol, L Laurin US Patent App. 18/499,703, 2024 | | 2024 |
| Study of Ge-Rich Ge-Sb-Te Device-Dependent Segregation for Industrial Grade Embedded Phase-Change Memory E Petroni, M Allegra, M Baldo, L Laurin, A Serafini, L Favennec, ... PHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERS, 2024 | | 2024 |
| Memory device decoder configurations AN Noemaun, CS Danana, DP Panda, L Laurin, MJ Irwin, RC Thomas, ... US Patent 11,848,048, 2023 | | 2023 |
| Microelectronic devices, memory devices, and electronic systems UM Meotto, E Camerlenghi, P Tessariol, L Laurin US Patent 11,818,893, 2023 | | 2023 |
| Sequential voltage ramp-down of access lines of non-volatile memory device A Fayrushin, A Benvenuti, A Goda, L Laurin, H Liu US Patent 11,790,991, 2023 | | 2023 |
| TCAD Modeling of Germanium Behavior During Forming Operation in Ge-Rich ePCM M Baldo, L Laurin, E Petroni, C Pavesi, A Motta, D Ielmini, R Annunziata, ... 2023 International Conference on Simulation of Semiconductor Processes and …, 2023 | | 2023 |
| Unveiling Retention Physical Mechanism of Ge-rich GST ePCM Technology L Laurin, M Baldo, E Petroni, G Samanni, L Turconi, A Motta, M Borghi, ... 2023 IEEE International Reliability Physics Symposium (IRPS), 1-7, 2023 | | 2023 |
