Jungwook Choi
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Pact: Parameterized clipping activation for quantized neural networks
J Choi, Z Wang, S Venkataramani, PIJ Chuang, V Srinivasan, ...
arXiv preprint arXiv:1805.06085, 2018
Training deep neural networks with 8-bit floating point numbers
N Wang, J Choi, D Brand, CY Chen, K Gopalakrishnan
Advances in neural information processing systems, 7675-7684, 2018
Adacomp: Adaptive residual gradient compression for data-parallel distributed training
CY Chen, J Choi, D Brand, A Agrawal, W Zhang, K Gopalakrishnan
arXiv preprint arXiv:1712.02679, 2017
A scalable multi-TeraOPS deep learning processor core for AI trainina and inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE Symposium on VLSI Circuits, 35-36, 2018
Approximate computing: Challenges and opportunities
A Agrawal, J Choi, K Gopalakrishnan, S Gupta, R Nair, J Oh, DA Prener, ...
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2016
A real-time FPGA-based 20 000-word speech recognizer with optimized DRAM access
YK Choi, K You, J Choi, W Sung
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 2119-2131, 2010
An FPGA implementation of speech recognition with weighted finite state transducers
J Choi, K You, W Sung
2010 IEEE International Conference on Acoustics, Speech and Signal …, 2010
Accurate and Efficient 2-bit Quantized Neural Networks
J Choi, S Venkataramani, V Srinivasan, K Gopalakrishnan, Z Wang, ...
The Conference on Systems and Machine Learning (SysML), 2019
Bridging the accuracy gap for 2-bit quantized neural networks (qnn)
J Choi, PIJ Chuang, Z Wang, S Venkataramani, V Srinivasan, ...
arXiv preprint arXiv:1807.06964, 2018
Video-rate stereo matching using Markov random field TRW-S inference on a hybrid CPU+ FPGA computing platform
J Choi, RA Rutenbar
IEEE Transactions on Circuits and Systems for Video Technology 26 (2), 385-398, 2015
PROMISE: An end-to-end design of a programmable mixed-signal accelerator for machine-learning algorithms
P Srivastava, M Kang, SK Gonugondla, S Lim, J Choi, V Adve, NS Kim, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
Exploiting approximate computing for deep learning acceleration
CY Chen, J Choi, K Gopalakrishnan, V Srinivasan, S Venkataramani
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 821-826, 2018
Hardware implementation of MRF map inference on an FPGA platform
J Choi, RA Rutenbar
22nd International Conference on Field Programmable Logic and Applications …, 2012
Compensated-DNN: energy efficient low-precision deep neural networks by compensating quantization errors
S Jain, S Venkataramani, V Srinivasan, J Choi, P Chuang, L Chang
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
Hybrid 8-bit floating point (HFP8) training and inference for deep neural networks
X Sun, J Choi, CY Chen, N Wang, S Venkataramani, VV Srinivasan, X Cui, ...
Advances in Neural Information Processing Systems, 4900-4909, 2019
Error resilient MRF message passing architecture for stereo matching
J Choi, EP Kim, RA Rutenbar, NR Shanbhag
SiPS 2013 Proceedings, 348-353, 2013
POSTER: Design space exploration for performance optimization of deep neural networks on shared memory accelerators
S Venkataramani, J Choi, V Srinivasan, K Gopalakrishnan, L Chang
2017 26th International Conference on Parallel Architectures and Compilation …, 2017
VLSI for 5000-word continuous speech recognition
Y Choi, K You, J Choi, W Sung
2009 IEEE International Conference on Acoustics, Speech and Signal …, 2009
Robust machine learning systems: Challenges, current trends, perspectives, and the road ahead
M Shafique, M Naseer, T Theocharides, C Kyrkou, O Mutlu, L Orosa, ...
IEEE Design & Test 37 (2), 30-57, 2020
Memory access optimized VLSI for 5000-word continuous speech recognition
K You, Y Choi, J Choi, W Sung
Journal of Signal Processing Systems 63 (1), 95-105, 2011
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