Brucek Khailany
Brucek Khailany
Director of VLSI Research, NVIDIA
Verified email at - Homepage
Cited by
Cited by
GPUs and the future of parallel computing
SW Keckler, WJ Dally, B Khailany, M Garland, D Glasco
IEEE micro 31 (5), 7-17, 2011
Scnn: An accelerator for compressed-sparse convolutional neural networks
A Parashar, M Rhu, A Mukkara, A Puglielli, R Venkatesan, B Khailany, ...
ACM SIGARCH Computer Architecture News 45 (2), 27-40, 2017
Imagine: Media processing with streams
B Khailany, WJ Dally, UJ Kapasi, P Mattson, J Namkoong, JD Owens, ...
IEEE micro 21 (2), 35-46, 2001
Programmable stream processors
UJ Kapasi, S Rixner, WJ Dally, B Khailany, JH Ahn, P Mattson, JD Owens
Computer 36 (8), 54-62, 2003
Register organization for media processing
S Rixner, WJ Dally, B Khailany, P Mattson, UJ Kapasi, JD Owens
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
A bandwidth-efficient architecture for media processing
S Rixner, WJ Dally, UJ Kapasi, B Khailany, A López-Lagunas, PR Mattson, ...
Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998
The Imagine stream processor
UJ Kapasi, WJ Dally, S Rixner, JD Owens, B Khailany
Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002
Evaluating the imagine stream architecture
JH Ahn, WJ Dally, B Khailany, UJ Kapasi, A Das
ACM SIGARCH Computer Architecture News 32 (2), 14, 2004
CudaDMA: optimizing GPU memory bandwidth via warp specialization
M Bauer, H Cook, B Khailany
Proceedings of 2011 international conference for high performance computing …, 2011
Efficient conditional operations for data-parallel architectures
UJ Kapasi, WJ Dally, S Rixner, PR Mattson, JD Owens, B Khailany
Proceedings of the 33rd annual ACM/IEEE international symposium on …, 2000
A programmable 512 GOPS stream processor for signal, image, and video processing
BK Khailany, T Williams, J Lin, EP Long, M Rygh, DFW Tovey, WJ Dally
IEEE Journal of solid-state circuits 43 (1), 202-213, 2008
Unifying primary cache, scratch, and register file memories in a throughput processor
M Gebhart, SW Keckler, B Khailany, R Krashinsky, WJ Dally
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 96-106, 2012
Stream processors: Progammability and efficiency
WJ Dally, UJ Kapasi, B Khailany, JH Ahn, A Das
Queue 2 (1), 52-62, 2004
Exploring the VLSI scalability of stream processors
B Khailany, WJ Dally, S Rixner, UJ Kapasi, JD Owens, B Towles
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
The VLSI implementation and evaluation of area-and energy-efficient streaming media processors
B Khailany, WJ Dally
stanford university, 2003
Comparing Reyes and OpenGL on a stream architecture
JD Owens, B Khailany, B Towles, WJ Dally
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware …, 2002
VLSI design and verification of the Imagine processor
B Khailany, WJ Dally, A Chang, UJ Kapasi, J Namkoong, B Towles
Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002
A pausible bisynchronous FIFO for GALS systems
B Keller, M Fojtik, B Khailany
2015 21st IEEE International Symposium on Asynchronous Circuits and Systems, 1-8, 2015
Simba: Scaling deep-learning inference with multi-chip-module-based architecture
YS Shao, J Clemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
A modular digital VLSI flow for high-productivity SoC design
B Khailany, E Krimer, R Venkatesan, J Clemons, JS Emer, M Fojtik, ...
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
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