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Cited by
Cited by
Year
Clock domain crossing fault model and coverage metric for validation of SoC design
Y Feng, Z Zhou, D Tong, X Cheng
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
322007
Scheduling of parallelized synchronous dataflow actors
Z Zhou, K Desnos, M Pelcat, JF Nezan, W Plishker, SS Bhattacharyya
2013 International Symposium on System on Chip (SoC), 1-10, 2013
122013
Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing
Zheng Zhou, William Plishker, Shuvra S. Bhattacharyya, Karol Desnos, Maxime ...
Journal of Signal Processing Systems, 2014
10*2014
An energy efficient adaptive event detection scheme for wireless sensor network
Z Zhou, G Qu
ASAP 2011-22nd IEEE International Conference on Application-specific Systems …, 2011
52011
Systematic integration of flowgraph-and module-level parallelism in implementation of DSP applications on multiprocessor systems-on-chip
Z Zhou, CC Shen, W Plishker, HH Wu, SS Bhattacharyya
2012 IEEE 11th International Conference on Signal Processing 1, 402-408, 2012
32012
Scheduling for multi-core processor under process and temperature variation
Z Zhou, J Gu, G Qu
2012 IEEE 6th International Symposium on Embedded Multicore SoCs, 113-120, 2012
32012
Dataflow-based, Cross-platform Design Flow for DSP Applications
SSB Zheng Zhou, Chung-Ching Shen, William Plishker
Embedded Systems Development - From Functional Models to Implementations 20, 212, 2013
2013
Multi-scale scheduling techniques for signal processing systems
Z Zhou
University of Maryland, College Park, 2013
2013
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