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Monica Pereira
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Adaptable embedded systems
ACS Beck, CAL Lisbôa, L Carro
Springer Science & Business Media, 2012
742012
An FPGA-based heterogeneous coarse-grained dynamically reconfigurable architecture
R Ferreira, JG Vendramini, L Mucida, MM Pereira, L Carro
Proceedings of the 14th international conference on Compilers, architectures …, 2011
442011
A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures
R Ferreira, V Duarte, W Meireles, M Pereira, L Carro, S Wong
2013 International Conference on Embedded Computer Systems: Architectures …, 2013
242013
A run-time modulo scheduling by using a binary translation mechanism
R Ferreira, W Denver, M Pereira, J Quadros, L Carro, S Wong
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
202014
An investigation of latency prediction for NoC-based communication architectures using machine learning techniques
J Silva, M Kreutz, M Pereira, MD Costa-Abreu
The Journal of Supercomputing 75 (11), 7573-7591, 2019
182019
RoSA: a reconfigurable stream-based architecture
MM Pereira, BC de Oliveira, IS Silva
Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007
152007
A machine learning approach to accelerating DSE of reconfigurable accelerator systems
ASB Lopes, MM Pereira
2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2020
132020
A routing based genetic algorithm for task mapping on MPSoC
HMGA Rocha, ACS Beck, SMDM Maia, ME Kreutz, MM Pereira
2020 X Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2020
72020
Communication latency evaluation on a software-defined network-on-chip
RS Silva, PP Cruz, ME Kreutz, MM Pereira
2019 IX Brazilian Symposium on Computing Systems Engineering (SBESC), 1-7, 2019
72019
Run-time resource instantiation for fault tolerance in FPGAs
MM Pereira, L Braun, M Hübner, J Becker, L Carro
2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 88-95, 2011
72011
Generating optimized multicore accelerator architectures
ASB Lopes, M Brandalero, ACS Beck, MM Pereira
2019 IX Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2019
62019
Design space exploration using utnocs and genetic algorithm
JW De Mesquita, MO da Cruz, MM Pereira, ME Kreutz
2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC), 198-202, 2016
62016
A dynamic modulo scheduling with binary translation: Loop optimization with software compatibility
R Ferreira, W Denver, M Pereira, S Wong, CA Lisbȏa, L Carro
Journal of Signal Processing Systems 85, 45-66, 2016
52016
A dynamic reconfiguration approach for accelerating highly defective processors
MM Pereira, L Carro
2009 17th IFIP International Conference on Very Large Scale Integration …, 2009
52009
Dynamic reconfigurable computing: The alternative to homogeneous multicores under massive defect rates
M Magalhães Pereira, L Carro
International Journal of Reconfigurable Computing 2011 (1), 452589, 2011
42011
Dynamically adapted low-energy fault tolerant processors
MM Pereira, L Carro
2009 NASA/ESA Conference on Adaptive Hardware and Systems, 91-97, 2009
42009
Using traditional loop unrolling to fit application on a new hybrid reconfigurable architecture
MM Pereira, SRF de Araújo, BC de Gliveira, IS Silva
Proceedings of the 2008 ACM symposium on Applied computing, 1552-1553, 2008
42008
Mapping wired links in a hybrid wired-wireless network-on-chip
SS Oliveira, GEP Lima, MM Pereira, ME Kreutz, BM Carvalho
2020 X Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2020
32020
Attune: A heuristic based framework for parallel applications autotuning
H Rocha, J Schwarzrock, M Pereira, L Schnorr, P Navaux, A Lorenzon, ...
Anais Estendidos do X Simpósio Brasileiro de Engenharia de Sistemas …, 2020
32020
A runtime power-aware phase predictor for cgras
G Korol, M Jordan, RS Silva, MM Pereira, M Brandalero, MB Rutzig, ...
2019 International Conference on ReConFigurable Computing and FPGAs …, 2019
32019
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