Henry Selvaraj
Henry Selvaraj
Professor, Electrical and Computer Engineering, University of Nevada Las Vegas
Verified email at - Homepage
Cited by
Cited by
Distributed processing applications for UAV/drones: a survey
G Chmaj, H Selvaraj
Progress in Systems Engineering: Proceedings of the Twenty-Third …, 2015
Brain MRI slices classification using least squares support vector machine
H Selvaraj, ST Selvi, D Selvathi, L Gewali
International journal of intelligent computing in medical sciences & image …, 2007
An application of functional decomposition in ROM-based FSM implementation in FPGA devices
M Rawski, H Selvaraj, T Łuba
Journal of Systems Architecture 51 (6-7), 424-434, 2005
A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis
T Łuba, H Selvaraj
VLSI Design 3 (3-4), 289-300, 1995
A survey on bitcoin cryptocurrency and its mining
S Ghimire, H Selvaraj
2018 26th International Conference on Systems Engineering (ICSEng), 1-6, 2018
A survey of high level synthesis languages, tools, and compilers for reconfigurable high performance computing
L Daoud, D Zydek, H Selvaraj
Advances in Systems Science: Proceedings of the International Conference on …, 2014
Balanced multilevel decomposition and its applications in FPGA-based synthesis
T Łuba, H Selvaraj, M Nowicka, A Kraśniewski
Logic and Architecture Synthesis: State-of-the-art and novel approaches, 109-115, 1995
Efficient Implementation of digital filters with use of advanced synthesis methods targeted FPGA architectures
M Rawski, P Tomaszewicz, H Selvaraj, T Luba
8th Euromicro Conference on Digital System Design (DSD'05), 460-466, 2005
Content based image retrieval using a neuro-fuzzy technique
S Kulkami, B Verma, P Sharma, H Selvaraj
IJCNN'99. International Joint Conference on Neural Networks. Proceedings …, 1999
Fast and efficient processor allocation algorithm for torus-based chip multiprocessors
D Zydek, H Selvaraj
Computers & Electrical Engineering 37 (1), 91-105, 2011
Accelerating high performance computing applications: Using cpus, gpus, hybrid cpu/gpu, and fpgas
B Liu, D Zydek, H Selvaraj, L Gewali
2012 13th International Conference on Parallel and Distributed Computing …, 2012
Hardware implementation of processor allocation schemes for mesh-based chip multiprocessors
D Zydek, H Selvaraj
Microprocessors and Microsystems 34 (1), 39-48, 2010
Review of packet switching technologies for future NoC
D Zydek, N Shlayan, E Regentova, H Selvaraj
2008 19th International Conference on Systems Engineering, 306-311, 2008
Fast FPGA-based fault injection tool for embedded processors
MS Shirazi, B Morris, H Selvaraj
International Symposium on Quality Electronic Design (ISQED), 476-480, 2013
Application of symbolic functional decomposition concept in FSM implementation targeting FPGA devices
M Rawski, H Selvaraj, T Luba, P Szotkowski
Sixth International Conference on Computational Intelligence and Multimedia …, 2005
FSM implementation in embedded memory blocks of programmable logic devices using functional decomposition
H Selvaraj, M Rawski, T Luba
Proceedings. International Conference on Information Technology: Coding and …, 2002
Evaluation scheme for NoC-based CMP with integrated processor management system
D Zydek, H Selvaray, L Koszałka, I Poźniak-Koszałka
International Journal of Electronics and Telecommunications 56, 157-167, 2010
Energy characteristic of a processor allocator and a Network-on-Chip
D Zydek, H Selvaraj, G Borowik, T Łuba
Zielona Góra: Uniwersytet Zielonogórski, 2011
Processor allocation problem for NoC-based chip multiprocessors
D Zydek, H Selvaraj
2009 Sixth International Conference on Information Technology: New …, 2009
Fingerprint verification using wavelet transform
H Selvaraj, S Arivazhagan, L Ganesan
Proceedings Fifth International Conference on Computational Intelligence and …, 2003
The system can't perform the operation now. Try again later.
Articles 1–20