Ulrich Kühne
Ulrich Kühne
Verified email at telecom-paristech.fr
Title
Cited by
Cited by
Year
IMITATOR 2.5: A tool for analyzing robustness in scheduling problems
É André, L Fribourg, U Kühne, R Soulat
International Symposium on Formal Methods, 33-36, 2012
1012012
Formal verification of integer multipliers by combining Gröbner basis with logic reduction
A Sayed-Ahmed, D Große, U Kühne, M Soeken, R Drechsler
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
692016
HW/SW co-verification of embedded systems using bounded model checking
D Groβe, U Kühne, R Drechsler
Proceedings of the 16th ACM Great Lakes symposium on VLSI, 43-48, 2006
662006
WoLFram-a word level framework for formal verification
A Sülflow, U Kühne, G Fey, D Grosse, R Drechsler
2009 IEEE/IFIP International Symposium on Rapid System Prototyping, 11-17, 2009
462009
Analyzing functional coverage in bounded model checking
D Große, U Kuhne, R Drechsler
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
362008
Estimating functional coverage in bounded model checking
D Große, U Kuhne, R Drechsler
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
342007
Increasing the accuracy of SAT-based debugging
A Sulflow, G Fey, C Braunstein, U Kuhne, R Drechsler
2009 Design, Automation & Test in Europe Conference & Exhibition, 1326-1331, 2009
322009
Completeness-driven development
R Drechsler, M Diepenbeck, D Große, U Kühne, HM Le, J Seiter, ...
International Conference on Graph Transformation, 38-50, 2012
242012
Finite controlled invariants for sampled switched systems
L Fribourg, U Kühne, R Soulat
Formal Methods in System Design 45 (3), 303-329, 2014
222014
A generic representation of CCSL time constraints for UML/MARTE models
J Peters, R Wille, N Przigoda, U Kühne, R Drechsler
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
212015
Wissenschaftstheorie
UJ Kühne
Hans Jörg Sandkühler (ed.): Enzyklopädie Philosophie, 1778-1791, 1999
171999
Automated formal verification of processors based on architectural models
U Kühne, S Beyer, J Bormann, J Barstow
Formal Methods in Computer Aided Design, 129-136, 2010
152010
Verifying consistency between activity diagrams and their corresponding OCL contracts
C Hilken, J Seiter, R Wille, U Kühne, R Drechsler
Proceedings of the 2014 Forum on Specification and Design Languages (FDL …, 2014
142014
Simulation-based equivalence checking between SystemC models at different levels of abstraction
D Große, M Groß, U Kühne, R Drechsler
Proceedings of the 21st edition of the great lakes symposium on Great lakes …, 2011
142011
Parametric verification and test coverage for hybrid automata using the inverse method
L Fribourg, U Kühne
International Workshop on Reachability Problems, 191-204, 2011
132011
Evaluation of SAT like proof techniques for formal verification of word level circuits
A Sülflow, U Kühne, R Wille, D Große, R Drechsler
IEEE Workshop on RTL and High Level Testing, 31-36, 2007
132007
Property analysis and design understanding in a quality-driven bounded model checking flow
U Kühne, D Große, R Drechsler
2008 Ninth International Workshop on Microprocessor Test and Verification, 88-93, 2008
122008
Formal modeling and verification of cyber-physical systems
R Drechsler, U Kühne
Springer Fachmedien Wiesbaden, Wiesbaden, 2015
102015
Parametric verification and test coverage for hybrid automata using the inverse method
L Fribourg, U Kühne
International Journal of Foundations of Computer Science 24 (02), 233-249, 2013
102013
Ensuring safety and reliability of IP-based system design–a container approach
A Chandrasekharan, K Schmitz, U Kuhne, R Drechsler
2015 International Symposium on Rapid System Prototyping (RSP), 76-82, 2015
92015
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