Joonho Kong
Joonho Kong
Associate Professor, School of Electronics Engineering, Kyungpook National University
Verified email at knu.ac.kr
Title
Cited by
Cited by
Year
Recent thermal management techniques for microprocessors
J Kong, SW Chung, K Skadron
ACM Computing Surveys (CSUR) 44 (3), 1-42, 2012
2122012
PUFatt: Embedded platform attestation based on novel processor-based PUFs
J Kong, F Koushanfar, PK Pendyala, AR Sadeghi, C Wachsmann
2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2014
722014
Enhancing online power estimation accuracy for smartphones
M Kim, J Kong, SW Chung
IEEE Transactions on Consumer Electronics 58 (2), 333-339, 2012
442012
Selective wordline voltage boosting for caches to manage yield under process variations
Y Pan, J Kong, S Ozdemir, G Memik, SW Chung
Proceedings of the 46th Annual Design Automation Conference, 57-62, 2009
412009
Low-cost application-aware DVFS for multi-core architecture
J Kong, J Choi, L Choi, SW Chung
2008 Third International Conference on Convergence and Hybrid Information†…, 2008
312008
On the thermal attack in instruction caches
J Kong, JK John, EY Chung, SW Chung, J Hu
IEEE Transactions on Dependable and Secure Computing 7 (2), 217-223, 2010
242010
A survey on recent OS-level energy management techniques for mobile processing units
YG Kim, J Kong, SW Chung
IEEE Transactions on Parallel and Distributed Systems 29 (10), 2388-2401, 2018
202018
Processor-based strong physical unclonable functions with aging-based response tuning
J Kong, F Koushanfar
IEEE Transactions on Emerging Topics in Computing 2 (1), 16-29, 2013
182013
Exploiting narrow-width values for process variation-tolerant 3-D microprocessors
J Kong, SW Chung
Proceedings of the 49th Annual Design Automation Conference, 1197-1206, 2012
142012
Architecting large-scale SRAM arrays with monolithic 3D integration
J Kong, YH Gong, SW Chung
2017 IEEE/ACM International Symposium on Low Power Electronics and Design†…, 2017
132017
Leveraging process variation for performance and energy: In the perspective of overclocking
HB Jang, J Lee, J Kong, T Suh, SW Chung
IEEE Transactions on Computers 63 (5), 1316-1322, 2012
122012
A Dual Integer Register File Structure for Temperature-Aware Microprocessors
JH Choi, JH Kong, EY Chung, SW Chung
Journal of KIISE: Computer Systems and Theory 35 (12), 540-551, 2008
112008
Fine-grain voltage tuned cache architecture for yield management under process variations
J Kong, Y Pan, S Ozdemir, A Mohan, G Memik, SW Chung
IEEE transactions on very large scale integration (VLSI) systems 20 (8†…, 2011
102011
An adaptive thermal management framework for heterogeneous multi-core processors
YG Kim, M Kim, J Kong, SW Chung
IEEE Transactions on Computers 69 (6), 894-906, 2020
92020
An energy-efficient last-level cache architecture for process variation-tolerant 3D microprocessors
J Kong, F Koushanfar, SW Chung
IEEE Transactions on Computers 64 (9), 2460-2475, 2014
82014
Quantifying the Impact of Monolithic 3D (M3D) Integration on L1 Caches
YH Gong, J Kong, SW Chung
IEEE Transactions on Emerging Topics in Computing, 2019
52019
Towards refresh-optimized EDRAM-based caches with a selective fine-grain round-robin refresh scheme
J Kong, YH Gong, SW Chung
Microprocessors and Microsystems 49, 95-104, 2017
52017
A DVFS-aware cache bypassing technique for multiple clock domain mobile SoCs
J Kong, K Lee
IEICE Electronics Express 14 (11), 20170324-20170324, 2017
52017
An online power estimation technique for multi-core smartphones with advanced display components
M Kim, J Kong, SW Chung
2012 IEEE International Conference on Consumer Electronics (ICCE), 666-667, 2012
52012
Latch-based FPGA emulation method for design verification: case study with microprocessor
M Kim, J Kong, T Suh, SW Chung
Electronics letters 47 (9), 532-533, 2011
52011
The system can't perform the operation now. Try again later.
Articles 1–20