A 0.62 mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector K Bong, S Choi, C Kim, S Kang, Y Kim, HJ Yoo Solid-State Circuits Conference (ISSCC), 2017 IEEE International, 248-249, 2017 | 201* | 2017 |
A 4.9 mΩ-sensitivity mobile electrical impedance tomography IC for early breast-cancer detection system S Hong, K Lee, U Ha, H Kim, Y Lee, Y Kim, HJ Yoo IEEE Journal of Solid-State Circuits 50 (1), 245-257, 2014 | 181 | 2014 |
A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition J Park, I Hong, G Kim, Y Kim, K Lee, S Park, K Bong, HJ Yoo Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 …, 2013 | 51 | 2013 |
A 1.22 TOPS and 1.52 mW/MHz augmented reality multicore processor with neural network NoC for HMD applications G Kim, K Lee, Y Kim, S Park, I Hong, K Bong, HJ Yoo Solid-State Circuits, IEEE Journal of 50 (1), 113-124, 2015 | 49 | 2015 |
A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses I Hong, K Bong, D Shin, S Park, K Jason Lee, Y Kim, HJ Yoo Solid-State Circuits, IEEE Journal of 51 (1), 45-55, 2016 | 32 | 2016 |
A 17.5-fJ/bit energy-efficient analog SRAM for mixed-signal processing J Lee, D Shin, Y Kim, HJ Yoo IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (10 …, 2017 | 29 | 2017 |
A 0.55 V 1.1 mW artificial-intelligence processor with PVT compensation for micro robots Y Kim, D Shin, J Lee, Y Lee, HJ Yoo 2016 IEEE International Solid-State Circuits Conference (ISSCC), 258-259, 2016 | 25 | 2016 |
A 27 mW reconfigurable marker-less logarithmic camera pose estimation engine for mobile augmented reality processor I Hong, G Kim, Y Kim, D Kim, BG Nam, HJ Yoo IEEE Journal of Solid-State Circuits 50 (11), 2513-2523, 2015 | 24 | 2015 |
A 0.5V 54μW ultra-low-power recognition processor with 93.5% accuracy geometric vocabulary tree and 47.5% database compression Y Kim, I Hong, HJ Yoo Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, 1-3, 2015 | 23 | 2015 |
Low-power scalable 3-d face frontalization processor for cnn-based face recognition in mobile devices S Kang, J Lee, K Bong, C Kim, Y Kim, HJ Yoo IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018 | 20 | 2018 |
A 2.71 nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications I Hong, K Bong, D Shin, S Park, K Lee, Y Kim, HJ Yoo Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, 1-3, 2015 | 19 | 2015 |
A 0.55 V 1.1 mW artificial intelligence processor with on-chip PVT compensation for autonomous mobile robots Y Kim, D Shin, J Lee, Y Lee, HJ Yoo IEEE Transactions on Circuits and Systems I: Regular Papers 65 (2), 567-580, 2017 | 18 | 2017 |
22.3 A 0.5 V 9.26 μW 15.28 mΩ/√ Hz Bio-Impedance Sensor IC With 0.55 Overall Phase Error K Kim, JH Kim, S Gweon, J Lee, M Kim, Y Lee, S Kim, HJ Yoo 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 364-366, 2019 | 16 | 2019 |
A 0.5 V 54 μW Ultra-Low-Power Object Matching Processor for Micro Air Vehicle Navigation Y Kim, I Hong, J Park, HJ Yoo IEEE Transactions on Circuits and Systems I: Regular Papers 63 (3), 359-369, 2016 | 15 | 2016 |
A 4.9 mW neural network task scheduler for congestion-minimized network-on-chip in multi-core systems Y Kim, G Kim, I Hong, D Kim, HJ Yoo 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 213-216, 2014 | 12 | 2014 |
Brain: A low-power deep search engine for autonomous robots Y Kim, D Shin, J Lee, HJ Yoo IEEE Micro 37 (5), 11-19, 2017 | 10 | 2017 |
An augmented reality processor with a congestion-aware network-on-chip scheduler G Kim, D Kim, S Park, Y Kim, K Lee, I Hong, K Bong, HJ Yoo IEEE Micro 34 (6), 31-41, 2014 | 5 | 2014 |
A 34.1 fps scale-space processor with two-dimensional cache for real-time object recognition Y Kim, J Park, HJ Yoo 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 689-692, 2013 | 3 | 2013 |
A 1.41 mW on-chip/off-chip hybrid transposition table for low-power robust deep tree search in artificial intelligence SoCs D Shin, Y Kim, HJ Yoo 2017 30th IEEE International System-on-Chip Conference (SOCC), 138-142, 2017 | 1 | 2017 |
A 1.1 mW 32-thread artificial intelligence processor with 3-level transposition table and on-chip PVT compensation for autonomous mobile robots Y Kim, D Shin, J Lee, HJ Yoo 2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX), 1-2, 2016 | 1 | 2016 |